Ultra-Low Voltage Nano-Scale Memories - Integrated Circuits and Systems

Marc Notes: Includes bibliographical references and index. Description for Sales People: The goal of Ultra-Low Voltage Nano-Scale Memories is to provide a detailed explanation of the state-of-the-art nanometer and sub-1-V memory LSIs that are playing decisive roles in power conscious systems. Emerging problems between the device, circuit, and system levels are systematically discussed in terms of reliable high-speed operations of memory cells and peripheral logic circuits. The effectiveness of solutions at device and circuit levels is also described at length through clarifying noise components in an array, and even essential differences in ultra-low voltage operations between DRAMs and SRAMs. Moreover, various kinds of on-chip voltage converters necessary to solve the problems with internal power-supply managements are widely and deeply discussed. A lot of knowledge that authors have acquired to date, and circuits the authors regard as important are covered from the basics to the state-of-the-art. Thus, the book is beneficial to students and engineers interested in ultra-low voltage nano-scale LSIs. Table of Contents: An Introduction to LSI Design.- Ultra-Low Voltage Nano-Scale DRAM Cells.- Ultra-Low Voltage Nano-Scale SRAM Cells.- Leakage Reduction for Logic Circuits in RAMs.- Variability Issue in the Nanometer Era.- Reference Voltage Generators.- Voltage Down-Converters.- Voltage Up-Converters and Negative Voltage Generators.- High-Voltage Tolerant Circuits. Jacket Description/Back: Ultra-Low Voltage Nano-Scale Memories provides an in-depth discussion of the state-of-the-art nanometer and sub-1-V memory LSIs that are playing decisive roles in power conscious systems. Emerging problems between the device, circuit, and system levels are systematically covered in terms of reliable high-speed operations of memory cells and peripheral logic circuits. The effectiveness of solutions at device and circuit levels is also described at length through clarifying noise components in an array, and even essential differences in ultra-low voltage operations between DRAMs and SRAMs. Moreover, various kinds of on-chip voltage converters necessary to solve problems with internal power-supply managements are extensively discussed. This authoritative monograph addresses these design challenges for memory and circuit engineers as well as for researchers and students who are interested in ultra-low voltage nano-scale memory LSIs. Publisher Marketing: The goal of Ultra-Low Voltage Nano-Scale Memories is to provide a detailed explanation of the state-of-the-art nanometer and sub-1-V memory LSIs that are playing decisive roles in power conscious systems. Emerging problems between the device, circuit, and system levels are systematically discussed in terms of reliable high-speed operations of memory cells and peripheral logic circuits. The effectiveness of solutions at device and circuit levels is also described at length. Voltage scaling is prevented by many resulting problems, such as the ever-decreasing signal-to-noise-ratio and voltage margin of many tiny flip-flop circuits in a memory-cell array and peripheral circuits, and the ever-increasing leakage and variation in speed caused by variations in process, voltage, and temperature. The problems and promising solutions at device and circuit levels are discussed in detail through clarifying noise components in an array, and even essential differences in ultra-low voltage operations between DRAMs and SRAMs. Moreover, various kinds of on-chip voltage converters necessary to solve the problems with internal power-supply managements are widely and deeply discussed. experience in memory and low-voltage designs in industry, bridging the different necessary technologies between memory, digital, and analog technologies, and even between DRAMs and SRAMs. A lot of knowledge that authors have acquired to date, and circuits that authors regard as important are covered from the basics to the state-of-the-art. Thus, the book is beneficial to students and engineers interested in ultra-low voltage nano-scale LSIs. Moreover, it is instructive not only for memory designers, but also for all digital and analog LSI designers who are the front edge of such LSI developments, since it is full of insight to develop such LSIs.