Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld - Shoab Ahmed Khan - Kirjat - LAP LAMBERT Academic Publishing - 9783847336778 - torstai 5. tammikuuta 2012
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Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld

Shoab Ahmed Khan

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Run-time Reconfigurable Instruction Set Processor (Rt-risp): Design and Simulation Using Verilog-hld

Run-Time Reconfigurable Instruction Set Processors are next generation processors, which can optimize their instruction sets according to the demands of the applications being under execution on them. This optimization is achieved through reconfiguration in their hardware on fly. In this way the reconfigurable processors adapt their hardware, which is most suitable one for the running application and consequently they enhance the performance. Reconfigurable instruction set processors are the programmable processors that contain the reconfigurable logic in one or more of their functional units. The hardware design of such type of processors can be categorized into two main tasks: The design of reconfigurable logic itself and the design of the communication interface of reconfigurable logic with the remaining modules of the processor.

Media Kirjat     Paperback Book   (Kirja pehmeillä kansilla ja liimatulla selällä)
Julkaisupäivämäärä torstai 5. tammikuuta 2012
ISBN13 9783847336778
Tuottaja LAP LAMBERT Academic Publishing
Sivujen määrä 184
Mitta 150 × 11 × 226 mm   ·   292 g
Kieli German  

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